Sondrel offer ASIC design solutions that enable customers to minimise start up costs, reduce risk and time-to-market. We guide you through the difficult and complex decisions required to transform your innovation into an ASIC, identifying the best IP and silicon technology choices to achieve power, performance and cost goals. 

If your project is an emerging Deep Tech application, it is probably reliant on AI processing, it may have ultra low power requirements and it might require specialist design knowledge such as functional safety. Talk to Sondrel about our de-risked, fast-track IP platforms for tomorrow’s AI powered ASICs to accelerate your time-to-market and mitigate the risk they were designed for.


Cost optimisation

Our family of architectire frameworks can minimise your start-up costs as you don't have to start from scratch but can customise to create a bespoke solution for your ASIC. 

Quicker time to market

Developing an ASIC design can be a time-consuming process, which often brings pressure to bring your products to market quickly. Our expertise will ensure your design is reliable and meets all the necessary specifications with a reliable time to market time.

Reduced risk

Potential customers for new ICs are often concerned about the unknowns of choosing a custom SoC. We remove these concerns as well as reducing risk with our Architecting the Future chip architecture frameworks for heterogenous compute applications.


Advanced node experience

Sondrel creates silicon proven ASICs at the most advanced digital process technology nodes. Since 2002 Sondrel has taped out 100’s chips .

The timeline indicates the 1st tape-out time of the respective technology node by Sondrel.  Close inspection will reveal these each occurred within a short time of the first availability for silicon production on that node.



Our own unique tool chain flows

We have codified our incredible wealth of experience, particularly in back-end physical implementation with a combination of our own tool chain flows – Neon for project management and Helium for design. These checkpoint the flow with common check lists for well defined phases. And a Jira Software deployment compliments Neon with comprehensive task and defect management.

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Architecture Study Service

Having a concept for a new chip is only the first step, the next is to work out if it is feasible to make it at the right price point. Most companies dont have this expertise in house which is why Sondrel offers its Architectural Study Service.

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Architectural modelling

SoC developments are time pressured, resource constrained and face considerable risk. Add automotive ISO26262 FuSA requirements plus heterogenous compute for machine vision and AI processing and the determination whether the hardware platform will be optimal for the required software workloads becomes a huge challenge. Sondrel’s introduces the framework and how to reduce time-to-tapeout for a variety of designs by maximizing reuse.

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