Platform Architecture Approach to ​Automotive and AI Assisted SoC Designs​

SoC developments are time pressured, resource constrained and face considerable risk. Add automotive ISO26262 FuSA requirements plus heterogenous compute for machine vision and AI processing and the determination whether the hardware platform will be optimal for the required software workloads becomes a huge challenge.

Sondrel have applied the latest SoC architecture concepts to develop a framework for their Requirements Engineering, Systems Architecture and Virtual Prototyping phases of SoC design. Moreover, the approach was designed to enable optimal scaling of performance. Several reference SoC Architectures have been derived from this framework, each targeting specific application use cases and specific foundry process nodes from sub 10nm for higher end automotive applications through 20-40nm nodes for smaller IoT applications.

A paper presented at the Embedded World 2023 event introduced the framework and how it reduces time-to-tapeout for a variety of designs by maximizing reuse.  The architectural performance modelling methodology addresses topics such as how requirements of complex AI workloads, for example a ViT (Vision Transformers), are analysed for system architecture tuning and their impact on the overall design.


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Piyush Singh

SoC Architect

Piyush is responsible for heterogeneous Systems-On-Chip architecture development at Sondrel. His responsibilities include the analysis of customer use-case requirements, undertaking architectural studies and modelling virtual prototypes and to ultimately define optimal chip architectures. Prior engineering roles include chip performance engineer at Sondrel, embedded software at Ericsson, physical algorithms development at Imagination Technologies and SerDes RTL design at Texas Instruments.

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