Sondrel's talented Verification professionals will once again be presenting to their peers at an industry event this autumn. Both a paper and a tutorial given by Senior Sondrel engineers will be available to attendees of DVCon Europe. The event, to be held at the Holiday Inn within Munich City Centre, Germany on 29th and 30th October will attended by IC design experts and specialists in the verification and design for test fields from around Europe. This year, the hot topic of embedded software will feature on the agenda alongside verification specific subjects.
Having designed hundreds of complex digital SoCs and ASICs, Sondrel has extensive experience of the challenges facing verification specialists in digital designs. Gaining speed, efficiency and predictability in the design process through subsystem re-use is a favoured strategy that has enabled Sondrel to leverage its IP and reduce time to market for its clients. This year, Sondrel's team will elaborate on how re-use principles apply in the verification domain. The subject of Applying Design Patterns to Maximise Verification Re-use at Block, Subsystem and System-on-Chip level will be covered in a tutorial and a paper. Highly regarded verification experts from Sondrel's UK offices in Theale, near Reading and Bristol will be addressing the audience and taking questions on their experience of applying these principles to large digital designs on a 16nm process.
Revati Bothe, Paul Kaunds and Jesvin Johnson will be presenting the paper and tutorials.
To learn more about the conference and book your ticket to attend visit the DVCon Europe website here.
To find out more about Sondrel's specialist verification practice and the team successes for clients in China, the USA, Europe, Israel, Russia, Korea and Taiwan, click here.