With a growing presence in Hyderabad India and a world class verification practice, it is no surprise that leading IC Design consultancy Sondrel will be exhibiting at DVCon India this September in Bangalore.
Visit our stand
Sondrel will be exhibiting at the event so make a note to visit our stand 21 near the registration area, meet our colleagues and learn more about our company and our IC Design centre of excellence in HiTec City, Hyderabad. To view a floorplan of the event click here.
Meet our senior verification specialists
Two senior engineering managers from the Hyderabad design centre will be giving a tutorial on how to apply verification techniques effectively and with expedience on large scale, complex digital chip designs. Sondrel's Manish Singhal and Kiran Kokandala will be sharing their experience with other digital verification professionals at the conference.
Enjoy our tutorial
In their 30 minute tutorial Kiran and Manish will be explaining the key tactics used by Sondrel to accomplish the verification planning, environment development and coverage goals for large projects on time and also on or under budget. Verification in large and complex digital designs is a critical workstream. Ineffective planning can cause major hold ups further downstream which can cause not only deadline slippage but budget overruns. By contrast, expedient and insightful approaches to verification at block, subsystem and on-system chip levels can create time savings and and generate insights that dramatically improve the outcomes for other functional areas.
Drawing largely on examples from major, complex System on Chip designs the team will demonstrate how to foresee and avoid issues or solve design challenges by applying design patterns. The speakers will also highlight some of the benefits of the approach, such as configurability and reusability of UVM and C code. How do verification experts make a theoretical approach a repeatable success? Find out at the tutorial.