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Staff DFT Engineer
- Posted on:
- Region: United Kingdom, Location: Theale or Bristol
The Senior DFT Design Engineer is expected to work as part of our growing System on Chip design team. The engineer will lead a team of DFT engineers and be responsible for implementation and verification of a full commercial silicon test strategy for comp
Senior Verification Engineer
- Posted on:
- Region: United Kingdom, Location: Theale or Bristol
Candidates will be a hands-on technical contributor on ASIC/SoC and IP development projects. Candidate will contribute to verification projects using high level verification languages.
Senior Physical Design Engineer
- Posted on:
- Location: Theale or Bristol
The Consultant Physical Designer is expected to work as part of a Physical implementation design team. Within the team the designer will have responsibility for block development from RTL to GDS and will be expected to be diligent in their ownership of th