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WT20/01/20

Purpose of role:

Candidate will be a hands-on technical contributor on ASIC/SoC and IP development projects. Candidate will contribute to verification projects using high level verification languages. You will work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies. This position also involves analyzing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment.

Responsibilities:

· Keep up to date with all the advances in the field and ensure the company is well at the forefront of the state of the art technology, methodologies and processes used in the industry

· Contribute to creative and talented technical teams able to achieve targets

· Skills and Specifications : Hands-on skills in IP and/or SoC level functional verification

· Communicate with cross functional teams and contribute to verification plans

· Independently deliver a verification task to agreed goals with some guidance from more senior engineers

· Contribute to technical white papers

· Contribute to creation of sales documents

Qualifications:

A degree/masters or PhD in either a relevant or non-relevant subject

Skills & experience:

Essential:

· Minimum of 1-2 years experience; Follows broad instructions

· Metric driven verification, verification planning, functional coverage, code coverage, verilog, Unit level or Top-level verification

· Contributes to technical projects with some guidance

· Some ability to work independently but will work as part of a team.

· Solves problems of moderate complexity

· Applies judgment in interpreting results and conducting quantitative analysis

· Integrates thorough technical knowledge within discipline

· Interacts with more experienced team members and managers to resolve complex problems

· Applies knowledge of a single OR multiple sub function(s)

· May lead or train others on the team

· Contributes to technical white papers

· Contributes to sales support as part of a team effort

Desirable:

. System Verilog, UVM, ABV, constrained random verification VHDL, PSL, SVA, e VMM, OVM Formal verification

. Model checking, CDC Power aware verification – UPF and or CPF, RTL and gate-level simulation SoC level verification

. HW/SW co-verification, multi-mode simulation HW acceleration

. Emulation Verification infrastructure automation

. Perl, Python, Java, Tcl, IP-XACT Coverage databases e.g. UCDB.

Attributes:

Excellent leadership, communication and negotiation and time management skills

· Self-organisation and ability to respond to changing priorities quickly

· Team player and self motivated

· Ability to work under pressure

· Organisation and problem solving skills

· Excellent attention to detail

· Able to work under own initiative

· A willingness to travel on a regular basis and work the required hours

Remuneration & Benefits:


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