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Purpose of role:
A key technical contributor on ASIC and IP development projects, working very closely with the ASIC engineering management to define and implement digital IP designs and integrate these and 3rd party designs into customer ASICs and SoCs.
The role involves working with customer requirements and providing technical advice and solutions in collaboration with multi-site development teams in producing high-quality designs.
The design professional will co-ordinate and contribute to the technical elements of the design process using a range of hardware description languages and tools. You will also be involved in providing verification support based on their micro-architectural knowledge and ensuring clear communication of risks and issues to other teams using a variety of media, including high quality documentation.
Why work for Sondrel?
- Learning & leadership opportunity to be exposed to cutting-edge technologies and global business.
- Opportunity to work on applications such as AI, Automotive, Fintech and Internet of Things (IoT).
- World Class Customers.
- Multi-cultural, multinational work environment with challenges.
- Work for one of Europe's leading concept-to-silicon design centers and play a key role in working on a variety of exciting projects.
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development.
- Work Life Balance.
- Keep up to date with relevant engineering advances in the field and ensure that Sondrel is kept at the forefront of the state-of-the-art technologies, methodologies and design processes as used in the industry
- Provide technical and practical support to junior team members to assist them in resolving problems and developing skills.
- Drive the analysis of customer requirements and implementation of functional digital designs and integration flows for complex SoCs.
- Collaborate with all engineering disciplines, providing traceable communication of issues, advice and suggestions.
- Support engineering management team in the co-ordination of designs and methodologies across the company and provide program management team with realistic estimates of technical risks and design effort.
- Development, maintenance and deployment of proprietary scripts and tools used in the design and database management of ASICs/SoCs.
- Deployment of industry-leading EDA tools for design quality assurance, power optimisation, constraints generation and synthesis/timing analysis.
- Collaborate with architects to define micro-architecture of IPs' and translation into sound, efficient RTL designs. Also provide innovative solutions to complex SoC integration issues.
- Communicate effectively with wider engineering teams and provide communication channels for less experienced engineers.
- Create and present technical papers for internal or external distribution.
- Supports in HR hiring process - Interviews, referring engineers against vacancies.
UG/PG: B.Tech/B.E. - Electrical, Electronics/Telecommunication, Computers. Experience of minimum 5+ years is mandatory.
Skills and Experience:
- Minimum of 5 years’ experience; follows broad instructions.
- Excellent knowledge of digital design concepts.
- Strong knowledge in RTL (FPGA/SOC/IP) design architecture & design;
- Provide technical guidance and communication channels to Consultant engineers.
- Some ability to work independently but will work as part of a team.
- Solves problems of moderate-advanced complexity.
- Applies judgment in interpreting results and conducting quantitative analysis.
- Integrates thorough technical knowledge within discipline Interacts with more experienced team members and managers to resolve complex problems.
- Applies knowledge of multiple sub function(s) May lead or train others on the team.
- Contributes to technical white papers, sales support as part of a team effort.
- HDL coding - VHDL, Verilog, System Verilog
- System design knowledge – clock domain management, reset schemes and power management
- Design for Test
- Design checking – Lint, CDC
- Power intent– UPF and or CPF
- Synthesis and constraints generation
- SoC level verification – HW/SW co-verification, multi-mode simulation, Gate-level simulation
- Database Management
- Perl, Python, Java, Tcl, IP-XACT
- Excellent communication and time management skills.
- Self-organisation and ability to respond to changing priorities quickly.
- Team player, self-motivated and able to work under pressure.
- Organisation and problem-solving skills
- Excellent attention to detail.
- Result-oriented with quality deliverable.
- Technical supervision of engineers
- Ability to estimate risks and effort requirements.
Remuneration / Benefits :
- Competitive remuneration including a company financial bonus.
- Fantastic opportunity to join a rapidly growing cutting-edge design company.
- Excellent training and career-progression opportunities with the option for exemplary candidates to lead and manage their own team.
- Opportunity for international travel to other Sondrel sites.