Sondrel have an opportunity to hire a DfT Engineer based in one of the UK offices; Theale, Kings Langley or Bristol. The successful engineer will be working on a variety of projects and technologies down to 7nm.
You will lead a team of DFT engineers and be responsible for implementation and verification of a full commercial silicon test strategy for complex SoCs. This role would be ideal for an Engineer with a minimum 6 years’ experience.
Why work for Sondrel?
- Sondrel’s engineers gain a wealth of experience and exposure to numerous projects, technologies, applications and personal engagements. Applications can include; AI, Automotive, and Internet of Things (IoT);
- Lead some of the most complex designs or learn from other talented engineering capabilities, whilst working on one of the numerous designs in progress at a time;
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development.
- Researching leading techniques for efficient, structured test of digital and analogue silicon circuits and adapting them for specific customer requirements to create a clear strategy document.
- Work with both junior and senior engineers to provide them with the direction to achieve the agreed test targets.
- Leading a small group of DFT engineers, planning the remaining work, assigning tasks, managing priorities, reporting progress to the programme manager and to the project manager.
- RTL design, qualification and verification of DFT controllers and associated logic.
- Lead DFT flow development.
- Communicate with the customer to generate an agreed suite of ATE test vectors to take the SoC to production as quickly as possible and be responsible for ATE bring-up.
- Excellent communication skills with team members, management and to engage professionally and directly with customers;
- Work as a team across global locations, supporting and mentoring others to achieve the best outcome.
- Unix/Linux environments and associated shell scripting
- VHDL & Verilog RTL coding and debugging techniques
- Experience of architecting complex, hierarchical scan solutions on large SoCs.
- Deep knowledge of the leading EDA vendors’ tool offerings in the fields of scan insertion/simulation, boundary scan and memory BIST/repair.
- Experience of developing ATE test programmes and supporting product engineering teams to bring up and debug these.
- Microelectronics degree or equivalent
Remuneration / Benefits:
- Competitive remuneration and additional benefits including a company financial bonus.