This role is expected to work as part of a back-end design team and will be responsible for DFT (including ATPG) implementation on whole chip or block level design.
This role would be ideal for an engineer with 10 years’ experience. The role is based in Xi'an.
Why work for Sondrel?
- Sondrel’s engineers gain a wealth of experience and exposure to numerous projects, technologies, applications and personal engagements. Applications can include; AI, Automotive, and Internet of Things (IoT);
- Lead some of the most complex designs or learn from other talented engineering capabilities, whilst working on one of the numerous designs in progress at a time;
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development.
- Should show experience and significant ability in all the tools or be an outstanding expert in one or two.
- Should be capable of solving problems of significant complexity.
- Defines and leads large projects of a highly technical nature.
- Should be capable of interacting with team members and the engineering management team.
- Provides input to team members and managers on project, technical or innovation issues
- Responsible for implementing changes to technologies and services
- Helps to define new standards that others will follow
- Should be a team leader to lead a team to work on customer/internal large/complex projects.
- Should be able to train the junior engineers or engineer of other technical domain like PD/DV for the related DFT skills
- Contributes to the development of technical sales documents such as a Statement of Work
- Listens to customer feedback, recognizes opportunities, and push that into business opportunity with Sondrel Business Team
- Should be able to take multi-assignments from different customers/Teams
- Should be able to contributes to technical white papers and present at internal and external conferences and will contribute to sales support as part of a team
- Expertise with DfT tools from Mentor, Synopsys, or Cadence: Scan/MBIST/BSD/LBIST insertion using either Mentor Tessent, Synopsys DC, or Cadence RC; ATPG using either Mentor Tessent, Synopsys TetraMax, or Cadence ET; Pattern verification using VCS/NC-Verilog/NC-sim/ModelSim
- Good knowledge of DFT
- Experience of DFT architecture design
- Domain experts who are tracing the technology development in DFT domain, lead the technical innovation within Sondrel
- Strong Project Management Capability
- Good communication skill and customer development capability
- Good Oral and Written English
- A Bachelor degree/Masters or PhD in either a relevant subject
Remuneration / Benefits:
- Competitive remuneration and additional benefits including a company financial bonus
To apply, please contact and send an e-mail attaching your CV to firstname.lastname@example.org