Principal Engineering Consultant

AC290121/01

Purpose of Role

The primary aim of this role is to lead design verification projects as specified by the Director of Engineering. Serves as a subject matter expert in functional verification, able to define the technical approach, solve complex problems and provide input to team members, managers on project, technical or innovation issues. Uses technical knowledge to support the development of Statement of Work documents and must be able to lead technical discussions with customers.

Responsibilities

• First class team leadership skills.
• The ability to mentor and develops team members to create innovative new ideas and promote a highly creative environment.
• Set standards for the technological development in the company and lead the staff towards its fulfilment.
• Keep up to date with all the advances in the field and ensure the company is well at the forefront of the state-of-the-art technology, methodologies and processes used in the industry.
• Gather creative and talented technical staff and form a team for achievement of targets.
• Skills and Specifications: Hands-on expertise in IP and/or SoC level functional verification.
• Track development activities and administer milestones deliverables.
• Coordinate and communicate with cross functional teams to define and create verification plans.
• A proven track record of delivering ground-breaking optimised design solutions in a functional verification.
• A sound analysis of design methodology in order to deliver robust optimised design solutions to agreed goals.
• Represent employer at conferences and meetings and present technical papers.
  

Qualifications

Essential:

• A degree/masters or PhD in either a relevant or non-relevant subject.

Skills & Experience

Essential:

• Typically, 10+ years’ experience. Guided by program or project objectives.
• Serves as a subject matter expert within a technical discipline with latitude for decision making.
  
• Metric driven verification, verification planning, functional coverage, code coverage, SystemVerilog, UVM, ABV, Unit level and top-level verification, testbench architecture design.
• Serves as an independent individual contributor to technical project.
• Proven capability as a problem solver with an ability to work individually or as part of a team.
• Evaluates issues and defines solutions.
• Provides advice and guidance to less experienced team members.
• Broadens cross disciplinary knowledge through new assignments.
• Applies advanced knowledge of a single sub-function OR thorough knowledge of multiple sub-functions.
• Listens to customer feedback, recognises opportunities and provides feedback for technical innovation.
• Contributes to technical discussions with customers at all stages of sales interaction.
• Contributes to the development of technical sales documents such as a Statement of Work.
• Develops and presents technical white papers.

Desirable:

• SystemVerilog, UVM, ABV, constrained random verification.
• VHDL, PSL, SVA, e.
• VMM, OVM.
• Formal verification – model checking, CDC, coverage closure, x-prop.
• Power aware verification – UPF and or CPF, RTL and gate-level simulation.
• SoC level verification – HW/SW co-verification, multi-mode simulation.
• HW acceleration – emulation Verification infrastructure automation – Perl, Python, Java, Tcl, IP-XACT.
• Coverage databases e.g. UCDB.

Remuneration & Benefits

• Competitive salary
  
• Annual company bonus
  
• Flexible working
  
• 25 days paid annual holiday
  
• Company Pension Scheme
  
• Opportunity to travel both domestically and internationally
  
• Opportunity for career progression