Sondrel is well-known for delivering quality, highly complex Integrated Circuit designs to fabless and systems companies globally. Our designs have appeared in hundreds of leading-edge products including those of the market leaders in mobile phones, cameras, security systems, AR/VR systems, network switches and routers, and many more.
Operating from our design centres in UK, France, Morocco, China and India, our clients engage with us from concept all the way to production silicon, or use our individually tailored specialist services. Our success is based on our knowledge of how to get the most out of silicon, and how to get it to market reliably, on time and at the right price.
This is an opportunity for a Hardware Design Engineer with a background in Verification and performance analysis to join our SoC design team. You will be an expert in AMBA protocols such as ACE and AXI4 and will be expected to take ownership of interconnect performance on our SoC designs. You will have a background in working on last level cache, coherency and DDR controller arbitration schemes.
Why work for Sondrel?
- You will be exposed to cutting-edge technologies and work on projects down to 7nm;
- Opportunity to work on applications such as AI, Automotive, Fintech and Internet of Things (IoT);
- Work for one of Europe's leading concept-to-silicon design centres and play a key role in working on a variety of exciting projects;
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development.
- Take ownership of Sondrel’s SoC design team’s Interconnect performance verification environment;
- Active member of Sondrel’s top-level performance verification team as well as key contributor in Interconnect and Interconnect sub-system performance verification;
- Management of the performance verification platform development and maintenance allowing our Hardware Designers and SoC Architects to create performance scenarios;
- Act as a support function for Sondrel’s top-level Verification team and work on coherent / cache traffic.
- Good understanding of digital hardware design with some experience of Hardware Design / Verification in Verilog, SystemVerilog or VHDL;
- Experience of scripting using Python, with some experience in Verilog/VHDL parsing and code generation;
- Extensive experience of coding in C++ with a particular focus on C++ template meta-programming;
- Hands-on experience of working with AMBA bus protocols such as ACE or AXI;
- Understanding of cache coherence mechanisms such as MOESI and MESI;
- Knowledge of cycle accurate hardware modelling in SystemC;
- Basic understanding of modern on-chip interconnects such as Network-on-Chip (NoC).
This role can be based at our following UK locations: Bristol, Kings Langley (near North London) and Theale (near Reading).