Verification Engineer

Purpose Of Role

Candidate will be a hands-on technical contributor on ASIC/SoC and IP development projects. Candidate will contribute to verification projects using high level verification languages. You will work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies. This position also involves analysing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment.

Responsibilities

  • Keep up to date with all the advances in the field and ensure the company is well at the forefront of the state-of-the-art technology, methodologies and processes used in the industry
  • Contribute to creative and talented technical teams able to achieve targets
  • Skills and Specifications: Hands-on skills in IP and/or SoC level functional verification
  • Communicate with cross functional teams and contribute to verification plans
  • Independently deliver a verification task to agreed goals with some guidance from more senior engineers
  • Contribute to technical white papers
  • Contribute to creation of sales documents
  • Contributes to technical projects with some guidance

Qualifications

  • A degree/masters or PhD in a relevant subject

Skills and Experience

  • Minimum of 1-2 years’ experience
  • Metric driven verification, verification planning, functional coverage, code coverage, verilog, Unit level or Top-level verification
  • Some ability to work independently but will work as part of a team.
  • Solves problems of moderate complexity
  • Applies judgment in interpreting results and conducting quantitative analysis
  • Integrates thorough technical knowledge within discipline
  • Ability to apply knowledge of a single OR multiple sub function(s)

The following skill sets would be desirable:

  • SystemVerilog, UVM, ABV, constrained random verification
  • VHDL, PSL, SVA, e
  • Formal verification – model checking, CDC
  • Power aware verification – UPF and or CPF, RTL and gate-level simulation
  • SoC level verification – HW/SW co-verification, multi-mode simulation
  • Verification infrastructure automation – Perl, Python, Java, Tcl, IP-XACT

Remuneration & Benefits

  • Competitive salary
  • Annual company bonus
  • Flexible working
  • 25 days paid annual holiday
  • Company pension scheme
  • Opportunity to travel both domestically and internationally
  • Opportunity for career progression

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