Senior Verification Engineer
Why work for Sondrel?
- Sondrel’s engineers gain a wealth of experience and exposure to numerous projects, technologies, applications and personal engagements. Applications can include; AI, Automotive, and Internet of Things (IoT)
- Lead some of the most complex designs or learn from other talented engineering capabilities, whilst working on one of the numerous designs in progress at a time
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development
- Should be able to train the junior engineers or engineer of other technical domain like DFT/PD for the related Design Verification skills.
- Work with architecture/IP designers to get a full deep insight on the DUT.
- SOC/Subsystem/Block level verification plan and test plan.
- Developing/Maintaining verification environment, including testbench setup/maintain, testcase create/triage, regression system, methodology/flow deployment.
- Analyze coverage gaps and devise strategies to fill coverage holes, ensuring on-time RTL freeze and signoff.
- The person could Follows plans and project steps defined by others, and serves as an independent individual contributor to technical project.
- Should be capable of solving problems of moderate complexity independently.
- Be able to evaluate issues and define solutions for issue fixing independently.
- Will be engaged in maintaining a high quality in their work.
- Should be able to contributes to technical white papers.
- Contributes to technical discussions with customers at all stages of sales interaction.
- Contributes to the development of technical sales documents such as a Statement of Work.
- Listens to customer feedback, recognizes opportunities and provides feedback for technical innovation, and push that into business opportunity with Sondrel Business Team.
- Should be capable of deliver assignments on time according to the schedule.
- Should be self-disciplined in executing design tasks.
- Should be a team leader to lead some junior engineers to work on customer/internal projects.
- Should be able to take multi-assignments from different customers/Teams.
- 5+ years’ work experience.
- Complex and large-scale SOC/Subsystem/IP/ASIC Design/Integration/Verification experiences. Strong knowledge of ARM Processor or Industry bus standard (PCI-e, HT, USB, AMBA) or Multimedia/Video/GPU/DDR is preferred.
- Good knowledge of UVM/OVM/VMM is a plus.
- Good knowledge of Verilog/C/C++/System C/SystemVerilog.
- Solid background of random techniques, coverage-driven verification environment with SVA/PSL assertions.
- Strong ability of scripting languages such as Perl, Python, Makefile, C Shell.
- Familiar with EDA tools, i.e. Synopsys VCS, Cadence IUS, Mentor QuestaSim, Spyglass.
- Low-power design/implementation/simulation flow with UPF/CPF.
- Experience of advanced technology is plus.
- Strong cooperation skills with global teams and communication skills with the ability to convey complex technical concepts to other design/verification peers in verbal or written form.
- Good at English for communication in talking/writing/reading.
- Team lead and management experiences.
- A Bachelor degree/masters or PhD in either a relevant subject
Remuneration / Benefits:
- Competitive remuneration and additional benefits including a company financial bonus
To apply, please contact and send an e-mail attaching your CV to email@example.com
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